1. Field of the Invention
The invention relates to an internal power voltage generating circuit for, e.g., a semiconductor memory device or a semiconductor device, as well as to a semiconductor memory device and a semiconductor device that have the internal power voltage generating circuit.
2. Description of Related Art
A non-volatile memory device using the Fowler-Nordheim (FN) tunneling effect, such as a flash memory, requires a predetermined high voltage (HV) for writing (programming) or erasing data. In this case, due to efficiency issues of a charge pump circuit, it is very difficult to decrease an external power voltage VCC. Therefore, an internal power voltage VDD is generated from the external power voltage VCC and is applied in peripheral circuits of the memory device. However, at this moment, it is necessary to adjust the internal power voltage VDD to an appropriate operating voltage range of peripheral metal-oxide-semiconductor (MOS) transistors. For example, in a NAND flash memory, an internal power voltage VDD of 2 to 2.3 V is usually generated (e.g., see Patent Document 1).